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| author | Denis Shienkov <denis.shienkov@gmail.com> | 2020-07-24 14:06:46 +0300 |
|---|---|---|
| committer | Denis Shienkov <denis.shienkov@gmail.com> | 2020-07-24 12:32:59 +0000 |
| commit | 96850f0680c67100028cdde6c8cc1b3987c2b11b (patch) | |
| tree | 768d588d5498df80fbad813bbbad008f3b985048 /tests/auto/blackbox/testdata-baremetal/one-object-asm-application | |
| parent | 0ac5a1467433cafe98e01598de25f155f24fcb2f (diff) | |
baremetal: Pass 'one-object-asm-application' test for GCC RL78
Change-Id: I512c90dc80c01524fdc1ec6f9c69545be3ba74af
Reviewed-by: Ivan Komissarov <ABBAPOH@gmail.com>
Diffstat (limited to 'tests/auto/blackbox/testdata-baremetal/one-object-asm-application')
| -rw-r--r-- | tests/auto/blackbox/testdata-baremetal/one-object-asm-application/one-object-asm-application.qbs | 2 | ||||
| -rw-r--r-- | tests/auto/blackbox/testdata-baremetal/one-object-asm-application/rl78-gcc.s | 11 |
2 files changed, 13 insertions, 0 deletions
diff --git a/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/one-object-asm-application.qbs b/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/one-object-asm-application.qbs index f556fc093..bc38d779d 100644 --- a/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/one-object-asm-application.qbs +++ b/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/one-object-asm-application.qbs @@ -36,6 +36,8 @@ BareMetalApplication { return true; if (qbs.architecture === "xtensa") return true; + if (qbs.architecture === "rl78") + return true; } console.info("unsupported toolset: %%" + qbs.toolchainType + "%%, %%" + qbs.architecture + "%%"); diff --git a/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/rl78-gcc.s b/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/rl78-gcc.s new file mode 100644 index 000000000..59510bd01 --- /dev/null +++ b/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/rl78-gcc.s @@ -0,0 +1,11 @@ +r8 = 0xffef0 +.text + .global _main + .type _main, @function +_main: + subw sp, #2 + clrw ax + movw [sp], ax + movw r8, ax + addw sp, #2 + ret |