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| author | Thiago Macieira <thiago.macieira@intel.com> | 2017-11-15 15:14:35 -0800 |
|---|---|---|
| committer | Thiago Macieira <thiago.macieira@intel.com> | 2017-11-30 08:30:37 +0000 |
| commit | ff1ffa7577ba88412daf9904bbc1e4de9e024436 (patch) | |
| tree | 7e2b3cc5e7ce12990421ae82d9e40e180759f92c /configure.pri | |
| parent | f984c453737bde9b39f14bd5ddabcde292b667d5 (diff) | |
Add support for AVX-512 intrinsics found in MSVC 2017 15.3
It seems the compiler supports /arch:AVX512 and /arch:AVX512F but none
of the other switches (and neither are documented). And when you pass
those, you also get Conflict Detection (CD), Double & Quad (DQ), Byte &
Word (BW) and Vector Length (VL), which matches the ICC switch
"-xCORE-AVX512". Unlike ICC, there doesn't seem to be an option to
enable only the common part of AVX-512.
Support for Intel Xeon Phi's current features (Exponential &
Reciprocation and Prefetch) and future ones (IFMA, VBMI, 4FMAPS, 4VNNI
and VPOPCNTDQ) seems to be missing altogether.
See https://blogs.msdn.microsoft.com/vcblog/2017/07/11/microsoft-visual-studio-2017-supports-intel-avx-512/
Change-Id: I98105cd9616b8097957db680d73eb1f86e487e6d
Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@qt.io>
Diffstat (limited to 'configure.pri')
0 files changed, 0 insertions, 0 deletions