diff options
author | Thiago Macieira <thiago.macieira@intel.com> | 2022-01-27 20:34:40 -0800 |
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committer | Thiago Macieira <thiago.macieira@intel.com> | 2022-01-28 22:40:22 -0800 |
commit | cdb78d79935cb3d1063601223548465bc09b26d8 (patch) | |
tree | 82758aef502f9ce7f4390772f1f1c43d3b29f05b /src/corelib/global/qfloat16.cpp | |
parent | 671035035a6f1846c05e052e4e745d5cb2b41306 (diff) |
qsimd/x86: disable the F16C, FMA, and VAES features if AVX is disabled
Those three features can't be used without the VEX prefix, which
requires that the OS has enabled saving of the AVX state on context
switches (i.e., use XSAVE).
The list is automatically maintained by the updated script in
OpenDCDiag[1]. I need to update the copy in util/x86simdgen.
[1] https://github.com/opendcdiag/opendcdiag/blob/main/framework/scripts/x86simd_generate.pl
Pick-to: 6.3
Change-Id: I6fcda969a9e9427198bffffd16ce55193a6cb069
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
Diffstat (limited to 'src/corelib/global/qfloat16.cpp')
-rw-r--r-- | src/corelib/global/qfloat16.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/corelib/global/qfloat16.cpp b/src/corelib/global/qfloat16.cpp index 9646943620..d816d8b888 100644 --- a/src/corelib/global/qfloat16.cpp +++ b/src/corelib/global/qfloat16.cpp @@ -194,9 +194,9 @@ int qfloat16::fpClassify() const noexcept #if QT_COMPILER_SUPPORTS(F16C) static inline bool hasFastF16() { - // All processors with F16C also support AVX, but YMM registers - // might not be supported by the OS, or they might be disabled. - return qCpuHasFeature(F16C) && qCpuHasFeature(AVX); + // qsimd.cpp:detectProcessorFeatures() turns off this feature if AVX + // state-saving is not enabled by the OS + return qCpuHasFeature(F16C); } QT_FUNCTION_TARGET(F16C) |