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authorThiago Macieira <thiago.macieira@intel.com>2014-08-12 09:47:41 -0700
committerThiago Macieira <thiago.macieira@intel.com>2014-08-13 16:36:00 +0200
commitc6718f01c20779da00689b3ef66ede7af5fe8ce5 (patch)
tree686f6db13d4aad9106f849ac60746036d14e0bb1 /src/corelib
parent10b9e1b6b4deadfa35caefb0c8fdc5b69c63fe0d (diff)
Correct the SYNC hint for the release barrier
The MIPS32 manual I have says 0x11 is SYNC_ACQUIRE and 0x12 is SYNC_RELEASE. The change was an unintentional mistake in commit 60b6b28c213a420ee40e254ff1823876098e0a04. Thanks to Spencer Schumann for spotting this. Change-Id: I16885e4e86e8befa8931733d0b5a54ac9942f176 Reviewed-by: Spencer Schumann <spencer.schumann@echostar.com> Reviewed-by: Olivier Goffart <ogoffart@woboq.com> Reviewed-by: Lisandro Damián Nicanor Pérez Meyer <perezmeyer@gmail.com>
Diffstat (limited to 'src/corelib')
-rw-r--r--src/corelib/arch/qatomic_mips.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/corelib/arch/qatomic_mips.h b/src/corelib/arch/qatomic_mips.h
index 7bfe16a450..33e7053234 100644
--- a/src/corelib/arch/qatomic_mips.h
+++ b/src/corelib/arch/qatomic_mips.h
@@ -121,7 +121,7 @@ void QBasicAtomicOps<size>::releaseMemoryFence(const T &) Q_DECL_NOTHROW
{
asm volatile (".set push\n"
".set mips32\n"
- "sync 0x11\n"
+ "sync 0x12\n"
".set pop\n" ::: "memory");
}