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| author | Robert Griebl <robert.griebl@pelagicore.com> | 2015-03-17 13:19:50 +0100 |
|---|---|---|
| committer | Robert Griebl <robert.griebl@pelagicore.com> | 2015-03-25 10:11:51 +0000 |
| commit | c885efb3cd3835bfd565575a450235cc8a7983a9 (patch) | |
| tree | d2bc976b10ba29eeb5b1900bff49432dd8c7e90c /src/corelib | |
| parent | 91feefd7d952d1e3a6b6e985afe34e2d726b2e38 (diff) | |
Skip non-exported slots early when creating a XML interface description.
This will prevent unnecessary warnings about unknown types for signals
or slots that are not even exported to the D-Bus.
Change-Id: Iecda5beca5ebe6665a193245fe1c2578156f6abe
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Diffstat (limited to 'src/corelib')
0 files changed, 0 insertions, 0 deletions