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author | Thiago Macieira <thiago.macieira@intel.com> | 2018-11-11 18:57:12 -0800 |
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committer | Thiago Macieira <thiago.macieira@intel.com> | 2018-12-12 03:44:31 +0000 |
commit | 58f2aa907f63bd0be61b2b6e55511c0867b42683 (patch) | |
tree | dcc819fcb56cf3a1502575095952fbabad5599ac /src/plugins/platformthemes | |
parent | 3df79b2953aa9142d66bd57676c6308acde98b47 (diff) |
Work around GCC bug in generating 64-bit population of SSE register
We know what code we want it to generate, so I just replaced the
_mm_set1_epi64x() with the code we want it to generate. Except that GCC
sees through and tries to "optimize" my code... so that asm() statement
makes it separate the two operations.
This generates optimal code for both 32- and 64-bit. 64-bit:
vmovq %rdi, %xmm0
vpbroadcastq %xmm0, %ymm0
32-bit:
vmovq 8(%esp), %xmm0
vpbroadcastq %xmm0, %ymm0
See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80820 and
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87976
Change-Id: I42a48bd64ccc41aebf84fffd15664109b97fe42b
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
Diffstat (limited to 'src/plugins/platformthemes')
0 files changed, 0 insertions, 0 deletions