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author | Thiago Macieira <thiago.macieira@intel.com> | 2023-08-23 09:51:10 -0700 |
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committer | Thiago Macieira <thiago.macieira@intel.com> | 2023-09-12 19:05:47 -0700 |
commit | 39d3af0c29147ff319e89c0be602d99af0af0996 (patch) | |
tree | ad216c2fb54cacea840232e36a80692fef1f4d80 /tests | |
parent | 6da6a17de9ccfcd5458ea72507b131660e0ab948 (diff) |
qsimd_p.h: rework the check for x86-64-v3 features
Instead of checking that all the features be present if any of them are
-- which is not an acceptable proposition, because each of them were
productized in at least one processor before -- let's simply insist that
they all be present if AVX2 is. That's what we can guarantee: all AVX2-
capable processors are capable of:
- AVX and earlier SSE (architecturally implied, so not checked)
- BMI1
- BMI2
- F16C
- FMA
- LZCNT
- POPCNT
This restores the original set of features that were checked in commit
ad65bbe4c061c4c1521b928a18ef9d68b7c69cbb when this was introduced, but
only if AVX2 is set. It also POPCNT, which was introduced with the
Nehalem architecture (which matches x86-64-v2) but aren't implied by
AVX.
GCC's -march=x86-64-v3 implies CRC32, but -march=haswell does not
because there were SKUs lacking CRC32, AES and PCLMULQDQ. This is
probably a bug in GCC.
Fixes: QTBUG-116357
Task-number: QTBUG-111698
Task-number: QTBUG-107072
Pick-to: 6.5 6.6
Change-Id: Ifa1111900d6945ea8e05fffd177e113eaa506dde
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Diffstat (limited to 'tests')
0 files changed, 0 insertions, 0 deletions