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-rw-r--r--config.tests/arch/arch.cpp35
-rw-r--r--src/corelib/global/archdetect.cpp114
-rw-r--r--src/corelib/global/global.pri1
-rw-r--r--src/corelib/global/qglobal.cpp131
-rw-r--r--src/corelib/global/qsysinfo.h3
5 files changed, 254 insertions, 30 deletions
diff --git a/config.tests/arch/arch.cpp b/config.tests/arch/arch.cpp
index b3c0d3b7d2..4e19ca6fb2 100644
--- a/config.tests/arch/arch.cpp
+++ b/config.tests/arch/arch.cpp
@@ -41,40 +41,14 @@
****************************************************************************/
#define QGLOBAL_H
-#include "../../src/corelib/global/qprocessordetection.h"
+#include "../../src/corelib/global/archdetect.cpp"
#include <stdio.h>
extern const char msg[];
-const char msg[] = "==Qt=magic=Qt== Architecture:"
+const char msg[] = "==Qt=magic=Qt== Architecture:" ARCH_PROCESSOR;
-#if defined(Q_PROCESSOR_ALPHA)
-"alpha"
-#elif defined(Q_PROCESSOR_ARM)
-"arm"
-#elif defined(Q_PROCESSOR_AVR32)
-"avr32"
-#elif defined(Q_PROCESSOR_BLACKFIN)
-"bfin"
-#elif defined(Q_PROCESSOR_X86_32)
-"i386"
-#elif defined(Q_PROCESSOR_X86_64)
-"x86_64"
-#elif defined(Q_PROCESSOR_IA64)
-"ia64"
-#elif defined(Q_PROCESSOR_MIPS)
-"mips"
-#elif defined(Q_PROCESSOR_POWER)
-"power"
-#elif defined(Q_PROCESSOR_S390)
-"s390"
-#elif defined(Q_PROCESSOR_SH)
-"sh"
-#elif defined(Q_PROCESSOR_SPARC)
-"sparc"
-#else
-"unknown"
-#endif
- ;
+extern const char msgfull[];
+const char msgfull[] = "==Qt=magic=Qt== Full Architecture:" ARCH_FULL;
extern const char msg2[];
const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
@@ -265,5 +239,6 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
int main()
{
puts(msg);
+ puts(msgfull);
puts(msg2);
}
diff --git a/src/corelib/global/archdetect.cpp b/src/corelib/global/archdetect.cpp
new file mode 100644
index 0000000000..a3f05a40db
--- /dev/null
+++ b/src/corelib/global/archdetect.cpp
@@ -0,0 +1,114 @@
+/****************************************************************************
+**
+** Copyright (C) 2013 Digia Plc and/or its subsidiary(-ies).
+** Copyright (C) 2014 Intel Corporation
+** Contact: http://www.qt-project.org/legal
+**
+** This file is part of the FOO module of the Qt Toolkit.
+**
+** $QT_BEGIN_LICENSE:LGPL$
+** Commercial License Usage
+** Licensees holding valid commercial Qt licenses may use this file in
+** accordance with the commercial license agreement provided with the
+** Software or, alternatively, in accordance with the terms contained in
+** a written agreement between you and Digia. For licensing terms and
+** conditions see http://qt.digia.com/licensing. For further information
+** use the contact form at http://qt.digia.com/contact-us.
+**
+** GNU Lesser General Public License Usage
+** Alternatively, this file may be used under the terms of the GNU Lesser
+** General Public License version 2.1 as published by the Free Software
+** Foundation and appearing in the file LICENSE.LGPL included in the
+** packaging of this file. Please review the following information to
+** ensure the GNU Lesser General Public License version 2.1 requirements
+** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
+**
+** In addition, as a special exception, Digia gives you certain additional
+** rights. These rights are described in the Digia Qt LGPL Exception
+** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
+**
+** GNU General Public License Usage
+** Alternatively, this file may be used under the terms of the GNU
+** General Public License version 3.0 as published by the Free Software
+** Foundation and appearing in the file LICENSE.GPL included in the
+** packaging of this file. Please review the following information to
+** ensure the GNU General Public License version 3.0 requirements will be
+** met: http://www.gnu.org/copyleft/gpl.html.
+**
+**
+** $QT_END_LICENSE$
+**
+****************************************************************************/
+
+#include "qprocessordetection.h"
+
+// main part: processor type
+#if defined(Q_PROCESSOR_ALPHA)
+# define ARCH_PROCESSOR "alpha"
+#elif defined(Q_PROCESSOR_ARM)
+# define ARCH_PROCESSOR "arm"
+#elif defined(Q_PROCESSOR_AVR32)
+# define ARCH_PROCESSOR "avr32"
+#elif defined(Q_PROCESSOR_BLACKFIN)
+# define ARCH_PROCESSOR "bfin"
+#elif defined(Q_PROCESSOR_X86_32)
+# define ARCH_PROCESSOR "i386"
+#elif defined(Q_PROCESSOR_X86_64)
+# define ARCH_PROCESSOR "x86_64"
+#elif defined(Q_PROCESSOR_IA64)
+# define ARCH_PROCESSOR "ia64"
+#elif defined(Q_PROCESSOR_MIPS)
+# define ARCH_PROCESSOR "mips"
+#elif defined(Q_PROCESSOR_POWER)
+# define ARCH_PROCESSOR "power"
+#elif defined(Q_PROCESSOR_S390)
+# define ARCH_PROCESSOR "s390"
+#elif defined(Q_PROCESSOR_SH)
+# define ARCH_PROCESSOR "sh"
+#elif defined(Q_PROCESSOR_SPARC)
+# define ARCH_PROCESSOR "sparc"
+#else
+# define ARCH_PROCESSOR "unknown"
+#endif
+
+// endinanness
+#if defined(Q_LITTLE_ENDIAN)
+# define ARCH_ENDIANNESS "little_endian"
+#elif defined(Q_BIG_ENDIAN)
+# define ARCH_ENDIANNESS "big_endian"
+#endif
+
+// pointer type
+#if defined(Q_OS_WIN64) || (defined(Q_OS_WINRT) && defined(_M_X64))
+# define ARCH_POINTER "llp64"
+#elif defined(__LP64__) || QT_POINTER_SIZE - 0 == 8
+# define ARCH_POINTER "lp64"
+#else
+# define ARCH_POINTER "ilp32"
+#endif
+
+// secondary: ABI string (includes the dash)
+#if defined(__ARM_EABI__) || defined(__mips_eabi)
+# define ARCH_ABI1 "-eabi"
+#elif defined(_MIPS_SIM)
+# if _MIPS_SIM == _ABIO32
+# define ARCH_ABI1 "-o32"
+# elif _MIPS_SIM == _ABIN32
+# define ARCH_ABI1 "-n32"
+# elif _MIPS_SIM == _ABI64
+# define ARCH_ABI1 "-n64"
+# elif _MIPS_SIM == _ABIO64
+# define ARCH_ABI1 "-o64"
+# endif
+#else
+# define ARCH_ABI1 ""
+#endif
+#if defined(__ARM_PCS_VFP) || defined(__mips_hard_float)
+# define ARCH_ABI2 "-hardfloat"
+#else
+# define ARCH_ABI2 ""
+#endif
+
+#define ARCH_ABI ARCH_ABI1 ARCH_ABI2
+
+#define ARCH_FULL ARCH_PROCESSOR "-" ARCH_ENDIANNESS "-" ARCH_POINTER ARCH_ABI
diff --git a/src/corelib/global/global.pri b/src/corelib/global/global.pri
index 308ba03bd7..fb0e7fd708 100644
--- a/src/corelib/global/global.pri
+++ b/src/corelib/global/global.pri
@@ -20,6 +20,7 @@ HEADERS += \
global/qhooks_p.h
SOURCES += \
+ global/archdetect.cpp \
global/qglobal.cpp \
global/qglobalstatic.cpp \
global/qlibraryinfo.cpp \
diff --git a/src/corelib/global/qglobal.cpp b/src/corelib/global/qglobal.cpp
index 66664f0f2a..94ce29d095 100644
--- a/src/corelib/global/qglobal.cpp
+++ b/src/corelib/global/qglobal.cpp
@@ -1,6 +1,7 @@
/****************************************************************************
**
** Copyright (C) 2013 Digia Plc and/or its subsidiary(-ies).
+** Copyright (C) 2014 Intel Corporation
** Contact: http://www.qt-project.org/legal
**
** This file is part of the QtCore module of the Qt Toolkit.
@@ -80,6 +81,8 @@
#include <private/qjni_p.h>
#endif
+#include "archdetect.cpp"
+
QT_BEGIN_NAMESPACE
#if !QT_DEPRECATED_SINCE(5, 0)
@@ -1500,6 +1503,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
\relates <QtGlobal>
Defined if the application is compiled for Alpha processors.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1509,6 +1514,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for ARM processors. Qt currently
supports three optional ARM revisions: \l Q_PROCESSOR_ARM_V5, \l
Q_PROCESSOR_ARM_V6, and \l Q_PROCESSOR_ARM_V7.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_ARM_V5
@@ -1516,6 +1523,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for ARMv5 processors. The \l
Q_PROCESSOR_ARM macro is also defined when Q_PROCESSOR_ARM_V5 is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_ARM_V6
@@ -1524,6 +1533,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for ARMv6 processors. The \l
Q_PROCESSOR_ARM and \l Q_PROCESSOR_ARM_V5 macros are also defined when
Q_PROCESSOR_ARM_V6 is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_ARM_V7
@@ -1532,6 +1543,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for ARMv7 processors. The \l
Q_PROCESSOR_ARM, \l Q_PROCESSOR_ARM_V5, and \l Q_PROCESSOR_ARM_V6 macros
are also defined when Q_PROCESSOR_ARM_V7 is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1539,6 +1552,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
\relates <QtGlobal>
Defined if the application is compiled for AVR32 processors.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1546,6 +1561,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
\relates <QtGlobal>
Defined if the application is compiled for Blackfin processors.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1554,6 +1571,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for IA-64 processors. This includes
all Itanium and Itanium 2 processors.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1564,6 +1583,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
supports seven MIPS revisions: \l Q_PROCESSOR_MIPS_I, \l
Q_PROCESSOR_MIPS_II, \l Q_PROCESSOR_MIPS_III, \l Q_PROCESSOR_MIPS_IV, \l
Q_PROCESSOR_MIPS_V, \l Q_PROCESSOR_MIPS_32, and \l Q_PROCESSOR_MIPS_64.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_MIPS_I
@@ -1571,6 +1592,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for MIPS-I processors. The \l
Q_PROCESSOR_MIPS macro is also defined when Q_PROCESSOR_MIPS_I is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_MIPS_II
@@ -1579,6 +1602,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for MIPS-II processors. The \l
Q_PROCESSOR_MIPS and \l Q_PROCESSOR_MIPS_I macros are also defined when
Q_PROCESSOR_MIPS_II is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_MIPS_32
@@ -1587,6 +1612,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for MIPS32 processors. The \l
Q_PROCESSOR_MIPS, \l Q_PROCESSOR_MIPS_I, and \l Q_PROCESSOR_MIPS_II macros
are also defined when Q_PROCESSOR_MIPS_32 is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_MIPS_III
@@ -1595,6 +1622,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for MIPS-III processors. The \l
Q_PROCESSOR_MIPS, \l Q_PROCESSOR_MIPS_I, and \l Q_PROCESSOR_MIPS_II macros
are also defined when Q_PROCESSOR_MIPS_III is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_MIPS_IV
@@ -1604,6 +1633,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Q_PROCESSOR_MIPS, \l Q_PROCESSOR_MIPS_I, \l Q_PROCESSOR_MIPS_II, and \l
Q_PROCESSOR_MIPS_III macros are also defined when Q_PROCESSOR_MIPS_IV is
defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_MIPS_V
@@ -1613,6 +1644,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Q_PROCESSOR_MIPS, \l Q_PROCESSOR_MIPS_I, \l Q_PROCESSOR_MIPS_II, \l
Q_PROCESSOR_MIPS_III, and \l Q_PROCESSOR_MIPS_IV macros are also defined
when Q_PROCESSOR_MIPS_V is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_MIPS_64
@@ -1622,6 +1655,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Q_PROCESSOR_MIPS, \l Q_PROCESSOR_MIPS_I, \l Q_PROCESSOR_MIPS_II, \l
Q_PROCESSOR_MIPS_III, \l Q_PROCESSOR_MIPS_IV, and \l Q_PROCESSOR_MIPS_V
macros are also defined when Q_PROCESSOR_MIPS_64 is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1631,6 +1666,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for POWER processors. Qt currently
supports two Power variants: \l Q_PROCESSOR_POWER_32 and \l
Q_PROCESSOR_POWER_64.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_POWER_32
@@ -1639,6 +1676,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for 32-bit Power processors. The \l
Q_PROCESSOR_POWER macro is also defined when Q_PROCESSOR_POWER_32 is
defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_POWER_64
@@ -1647,6 +1686,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for 64-bit Power processors. The \l
Q_PROCESSOR_POWER macro is also defined when Q_PROCESSOR_POWER_64 is
defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1655,6 +1696,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for S/390 processors. Qt supports
one optional variant of S/390: Q_PROCESSOR_S390_X.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_S390_X
@@ -1662,6 +1705,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for S/390x processors. The \l
Q_PROCESSOR_S390 macro is also defined when Q_PROCESSOR_S390_X is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1670,6 +1715,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for SuperH processors. Qt currently
supports one SuperH revision: \l Q_PROCESSOR_SH_4A.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_SH_4A
@@ -1677,6 +1724,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for SuperH 4A processors. The \l
Q_PROCESSOR_SH macro is also defined when Q_PROCESSOR_SH_4A is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1685,6 +1734,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for SPARC processors. Qt currently
supports one optional SPARC revision: \l Q_PROCESSOR_SPARC_V9.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_SPARC_V9
@@ -1693,6 +1744,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for SPARC V9 processors. The \l
Q_PROCESSOR_SPARC macro is also defined when Q_PROCESSOR_SPARC_V9 is
defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1701,6 +1754,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for x86 processors. Qt currently
supports two x86 variants: \l Q_PROCESSOR_X86_32 and \l Q_PROCESSOR_X86_64.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_X86_32
@@ -1709,6 +1764,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for 32-bit x86 processors. This
includes all i386, i486, i586, and i686 processors. The \l Q_PROCESSOR_X86
macro is also defined when Q_PROCESSOR_X86_32 is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
\macro Q_PROCESSOR_X86_64
@@ -1717,6 +1774,8 @@ bool qSharedBuild() Q_DECL_NOTHROW
Defined if the application is compiled for 64-bit x86 processors. This
includes all AMD64, Intel 64, and other x86_64/x64 processors. The \l
Q_PROCESSOR_X86 macro is also defined when Q_PROCESSOR_X86_64 is defined.
+
+ \sa QSysInfo::cpuArchitecture()
*/
/*!
@@ -1932,6 +1991,78 @@ const QSysInfo::WinVersion QSysInfo::WindowsVersion = QSysInfo::windowsVersion()
#endif
+
+/*!
+ \since 5.4
+
+ Returns the architecture of the CPU that Qt was compiled for, in text
+ format. Note that this may not match the actual CPU that the application is
+ running on if there's an emulation layer or if the CPU supports multiple
+ architectures (like x86-64 processors supporting i386 applications).
+
+ Values returned by this function are stable and will not change over time,
+ so applications can rely on the returned value as an identifier, except
+ that new CPU types may be added over time.
+
+ Typical returned values are (note: list not exhaustive):
+ \list
+ \li "arm"
+ \li "i386"
+ \li "mips"
+ \li "x86_64"
+ \li "power"
+ \li "sparc"
+ \endlist
+
+ \sa QSysInfo::fullCpuArchitecture()
+*/
+QString QSysInfo::cpuArchitecture()
+{
+ return QStringLiteral(ARCH_PROCESSOR);
+}
+
+/*!
+ \since 5.4
+
+ Returns the full architecture string that Qt was compiled for. This string
+ is useful for identifying different, incompatible builds. For example, it
+ can be used as an identifier to request an upgrade package from a server.
+
+ The values returned from this function are kept stable as follows: the
+ mandatory components of the result will not change in future versions of
+ Qt, but optional suffixes may be added.
+
+ The returned value is composed of three or more parts, separated by dashes
+ ("-"). They are:
+
+ \table
+ \header \li Component \li Value
+ \row \li CPU Architecture \li The same as QSysInfo::cpuArchitecture(), such as "arm", "i386", "mips" or "x86_64"
+ \row \li Endianness \li "little_endian" or "big_endian"
+ \row \li Word size \li Whether it's a 32- or 64-bit application. Possible values are:
+ "llp64" (Windows 64-bit), "lp64" (Unix 64-bit), "ilp32" (32-bit)
+ \row \li (Optional) ABI \li Zero or more components identifying different ABIs possible in this architecture.
+ Currently, Qt has optional ABI components for ARM and MIPS processors: one
+ component is the main ABI (such as "eabi", "o32", "n32", "o64"); another is
+ whether the calling convention is using hardware floating point registers ("hardfloat"
+ is present).
+ \endtable
+
+ \sa QSysInfo::cpuArchitecture()
+*/
+QString QSysInfo::fullCpuArchitecture()
+{
+#ifdef Q_COMPILER_UNICODE_STRINGS
+ // ARCH_FULL is a concatenation of strings (incl. ARCH_PROCESSOR), which breaks
+ // QStringLiteral on MSVC. Since the concatenation behavior we want is specified
+ // the same C++11 paper as the Unicode strings, we'll use that macro and hope
+ // that Microsoft implements the new behavior when they add support for Unicode strings.
+ return QStringLiteral(ARCH_FULL);
+#else
+ return QLatin1String(ARCH_FULL);
+#endif
+}
+
/*!
\macro void Q_ASSERT(bool test)
\relates <QtGlobal>
diff --git a/src/corelib/global/qsysinfo.h b/src/corelib/global/qsysinfo.h
index 38735c12de..fe78df4abb 100644
--- a/src/corelib/global/qsysinfo.h
+++ b/src/corelib/global/qsysinfo.h
@@ -162,6 +162,9 @@ public:
static const MacVersion MacintoshVersion;
static MacVersion macVersion();
#endif
+
+ static QString cpuArchitecture();
+ static QString fullCpuArchitecture();
};
QT_END_NAMESPACE