diff options
| -rw-r--r-- | cmake/QtCompilerOptimization.cmake | 4 | ||||
| -rw-r--r-- | cmake/QtFeature.cmake | 4 | ||||
| -rw-r--r-- | config.tests/x86_simd/main.cpp | 20 | ||||
| -rw-r--r-- | configure.cmake | 22 | ||||
| -rw-r--r-- | src/corelib/tools/qhash.cpp | 2 |
5 files changed, 47 insertions, 5 deletions
diff --git a/cmake/QtCompilerOptimization.cmake b/cmake/QtCompilerOptimization.cmake index 8f23a6acf9..ea07330945 100644 --- a/cmake/QtCompilerOptimization.cmake +++ b/cmake/QtCompilerOptimization.cmake @@ -28,6 +28,8 @@ if (MSVC) set(QT_CFLAGS_AVX512VL "-arch:AVX512") set(QT_CFLAGS_AVX512IFMA "-arch:AVX512") set(QT_CFLAGS_AVX512VBMI "-arch:AVX512") + set(QT_CFLAGS_AVX512VBMI2 "-arch:AVX512") + set(QT_CFLAGS_VAES "") endif() if(GCC OR CLANG OR QCC) @@ -51,8 +53,10 @@ if(GCC OR CLANG OR QCC) set(QT_CFLAGS_AVX512VL "-mavx512vl") set(QT_CFLAGS_AVX512IFMA "-mavx512ifma") set(QT_CFLAGS_AVX512VBMI "-mavx512vbmi") + set(QT_CFLAGS_AVX512VBMI2 "-mavx512vbmi2") set(QT_CFLAGS_AESNI "-maes") set(QT_CFLAGS_SHANI "-msha") + set(QT_CFLAGS_VAES "-mvaes") if(NOT UIKIT AND NOT QT_64BIT) set(QT_CFLAGS_NEON "-mfpu=neon") endif() diff --git a/cmake/QtFeature.cmake b/cmake/QtFeature.cmake index a9b8077e38..b9af639503 100644 --- a/cmake/QtFeature.cmake +++ b/cmake/QtFeature.cmake @@ -1074,7 +1074,7 @@ function(qt_config_compile_test_x86simd extension label) qt_get_platform_try_compile_vars(platform_try_compile_vars) list(APPEND flags ${platform_try_compile_vars}) - message(STATUS "Performing SIMD Test ${label}") + message(STATUS "Performing Test ${label} intrinsics") try_compile("TEST_X86SIMD_${extension}" "${CMAKE_CURRENT_BINARY_DIR}/config.tests/x86_simd_${extension}" "${CMAKE_CURRENT_SOURCE_DIR}/config.tests/x86_simd" @@ -1085,7 +1085,7 @@ function(qt_config_compile_test_x86simd extension label) else() set(status_label "Failed") endif() - message(STATUS "Performing SIMD Test ${label} - ${status_label}") + message(STATUS "Performing Test ${label} intrinsics - ${status_label}") set(TEST_subarch_${extension} "${TEST_X86SIMD_${extension}}" CACHE INTERNAL "${label}") endfunction() diff --git a/config.tests/x86_simd/main.cpp b/config.tests/x86_simd/main.cpp index 29c8b97c12..4f51e59a55 100644 --- a/config.tests/x86_simd/main.cpp +++ b/config.tests/x86_simd/main.cpp @@ -264,6 +264,26 @@ attribute_target("avx512ifma") void test_avx512ifma() } #endif +#if T(AVX512VBMI2) +attribute_target("avx512vl,avx512vbmi2") void test_avx512vbmi2() +{ + /* AVX512 Vector Byte Manipulation Instructions 2 */ + __m128i a = _mm_maskz_compress_epi16(-1, _mm_set1_epi16(1)); + __m128i b = _mm_shrdi_epi32(a, a, 7); +} +#endif + +#if T(VAES) +// VAES does not require AVX512 and works on Alder Lake +attribute_target("avx2,vaes") void test_vaes() +{ + /* 256- and 512-bit AES */ + __m256i a = _mm256_set1_epi32(-1); + __m256i b = _mm256_aesenc_epi128(a, a); + __m256i c = _mm256_aesdec_epi128(b, a); +} +#endif + int main() { return 0; diff --git a/configure.cmake b/configure.cmake index d5a5cfbdc3..92d501a4d1 100644 --- a/configure.cmake +++ b/configure.cmake @@ -304,6 +304,12 @@ qt_config_compile_test_x86simd(avx512ifma "AVX512 IFMA instructions") # avx512vbmi qt_config_compile_test_x86simd(avx512vbmi "AVX512 VBMI instructions") +# x86: avx512vbmi2 +qt_config_compile_test_x86simd(avx512vbmi2 "AVX512VBMI2") + +# x86: vaes +qt_config_compile_test_x86simd(vaes "VAES") + # posix_fallocate qt_config_compile_test(posix_fallocate LABEL "POSIX fallocate()" @@ -803,12 +809,24 @@ qt_feature("avx512vbmi" PRIVATE ) qt_feature_definition("avx512vbmi" "QT_COMPILER_SUPPORTS_AVX512VBMI" VALUE "1") qt_feature_config("avx512vbmi" QMAKE_PRIVATE_CONFIG) +qt_feature("avx512vbmi2" PRIVATE + LABEL "AVX512VBMI2" + CONDITION QT_FEATURE_avx512f AND TEST_subarch_avx512vbmi2 +) +qt_feature_definition("avx512vbmi2" "QT_COMPILER_SUPPORTS_AVX512VBMI2" VALUE "1") +qt_feature_config("avx512vbmi2" QMAKE_PRIVATE_CONFIG) qt_feature("aesni" PRIVATE LABEL "AES" CONDITION QT_FEATURE_sse2 AND TEST_subarch_aesni ) qt_feature_definition("aesni" "QT_COMPILER_SUPPORTS_AES" VALUE "1") qt_feature_config("aesni" QMAKE_PRIVATE_CONFIG) +qt_feature("vaes" PRIVATE + LABEL "VAES" + CONDITION QT_FEATURE_avx2 AND TEST_subarch_vaes +) +qt_feature_definition("vaes" "QT_COMPILER_SUPPORTS_VAES" VALUE "1") +qt_feature_config("vaes" QMAKE_PRIVATE_CONFIG) qt_feature("rdrnd" PRIVATE LABEL "RDRAND" CONDITION TEST_subarch_rdrnd @@ -1065,13 +1083,13 @@ qt_configure_add_summary_entry( ) qt_configure_add_summary_entry( TYPE "featureList" - ARGS "avx avx2" + ARGS "avx avx2 vaes" MESSAGE "AVX" CONDITION ( ( TEST_architecture_arch STREQUAL i386 ) OR ( TEST_architecture_arch STREQUAL x86_64 ) ) ) qt_configure_add_summary_entry( TYPE "featureList" - ARGS "avx512f avx512er avx512cd avx512pf avx512dq avx512bw avx512vl avx512ifma avx512vbmi" + ARGS "avx512f avx512er avx512cd avx512pf avx512dq avx512bw avx512vl avx512ifma avx512vbmi avx512vbmi2" MESSAGE "AVX512" CONDITION ( ( TEST_architecture_arch STREQUAL i386 ) OR ( TEST_architecture_arch STREQUAL x86_64 ) ) ) diff --git a/src/corelib/tools/qhash.cpp b/src/corelib/tools/qhash.cpp index b5aaaeee5b..5bea0bf9f0 100644 --- a/src/corelib/tools/qhash.cpp +++ b/src/corelib/tools/qhash.cpp @@ -680,7 +680,7 @@ aeshash256_lt32_avx256(__m256i state0, const uchar *p, size_t len) { __m128i state0_128 = _mm256_castsi256_si128(state0); if (len) { - __mmask32 mask = _bzhi_u32(-1, len); + __mmask32 mask = _bzhi_u32(-1, unsigned(len)); __m256i data = _mm256_maskz_loadu_epi8(mask, p); __m128i data0 = _mm256_castsi256_si128(data); if (len >= sizeof(__m128i)) { |