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authorLars Knoll <lars.knoll@qt.io>2018-10-15 10:20:26 +0200
committerErik Verbruggen <erik.verbruggen@qt.io>2018-10-15 08:25:03 +0000
commitf15f7245eaf900bb33f77ed06ba8156da2464fb9 (patch)
tree298ff2eb14a6f1b7b75304a852805a7f54f9f6cb /src/qml/jit
parent44eb850b2e0f27c3664b840fcc20c3b846e0818a (diff)
Revert "BaselineJIT: slightly improve arm codegen for shifts"
This reverts commit 41e15cb21c2f8924eee56aacc4ba8aace950cae5. The patch causes us to hit assertions in the x86/x64 JIT. Somehow this slipped through CI. Change-Id: Ia77ecb956472172bf5543c01fdccd6dddedba168 Reviewed-by: Erik Verbruggen <erik.verbruggen@qt.io>
Diffstat (limited to 'src/qml/jit')
-rw-r--r--src/qml/jit/qv4baselineassembler.cpp9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/qml/jit/qv4baselineassembler.cpp b/src/qml/jit/qv4baselineassembler.cpp
index 72e43c76a8..f6b745632b 100644
--- a/src/qml/jit/qv4baselineassembler.cpp
+++ b/src/qml/jit/qv4baselineassembler.cpp
@@ -1060,7 +1060,8 @@ void BaselineAssembler::ushr(int lhs)
PlatformAssembler::Address lhsAddr = regAddr(lhs);
pasm()->toInt32LhsAcc(lhsAddr, PlatformAssembler::ScratchRegister);
pasm()->and32(TrustedImm32(0x1f), PlatformAssembler::AccumulatorRegisterValue);
- pasm()->urshift32(PlatformAssembler::ScratchRegister, PlatformAssembler::AccumulatorRegisterValue, PlatformAssembler::AccumulatorRegisterValue);
+ pasm()->urshift32(PlatformAssembler::AccumulatorRegisterValue, PlatformAssembler::ScratchRegister);
+ pasm()->move(PlatformAssembler::ScratchRegister, PlatformAssembler::AccumulatorRegisterValue);
auto doubleEncode = pasm()->branch32(PlatformAssembler::LessThan,
PlatformAssembler::AccumulatorRegisterValue,
TrustedImm32(0));
@@ -1080,7 +1081,8 @@ void BaselineAssembler::shr(int lhs)
PlatformAssembler::Address lhsAddr = regAddr(lhs);
pasm()->toInt32LhsAcc(lhsAddr, PlatformAssembler::ScratchRegister);
pasm()->and32(TrustedImm32(0x1f), PlatformAssembler::AccumulatorRegisterValue);
- pasm()->rshift32(PlatformAssembler::ScratchRegister, PlatformAssembler::AccumulatorRegisterValue, PlatformAssembler::AccumulatorRegisterValue);
+ pasm()->rshift32(PlatformAssembler::AccumulatorRegisterValue, PlatformAssembler::ScratchRegister);
+ pasm()->move(PlatformAssembler::ScratchRegister, PlatformAssembler::AccumulatorRegisterValue);
pasm()->setAccumulatorTag(IntegerTag);
}
@@ -1089,7 +1091,8 @@ void BaselineAssembler::shl(int lhs)
PlatformAssembler::Address lhsAddr = regAddr(lhs);
pasm()->toInt32LhsAcc(lhsAddr, PlatformAssembler::ScratchRegister);
pasm()->and32(TrustedImm32(0x1f), PlatformAssembler::AccumulatorRegisterValue);
- pasm()->lshift32(PlatformAssembler::ScratchRegister, PlatformAssembler::AccumulatorRegisterValue, PlatformAssembler::AccumulatorRegisterValue);
+ pasm()->lshift32(PlatformAssembler::AccumulatorRegisterValue, PlatformAssembler::ScratchRegister);
+ pasm()->move(PlatformAssembler::ScratchRegister, PlatformAssembler::AccumulatorRegisterValue);
pasm()->setAccumulatorTag(IntegerTag);
}