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authorThiago Macieira <thiago.macieira@intel.com>2023-03-03 08:30:07 -0800
committerThiago Macieira <thiago.macieira@intel.com>2023-03-04 10:59:56 -0800
commit8413824ca00188fa36b6adf46d4a5bddb9515ec7 (patch)
treee70f29cd4ed764624cabaf479f4b4e00615eeb49
parent2a19c7ed13608e5f0784c0ea2ba0b1c515226665 (diff)
qsimd_p.h: remove LZCNT feature from the ARCH_HASWELL list
And for good measure, I'm also removing BMI2. The one we really care about ensuring gets enabled instead of -mavx2 is FMA anyway. Complements commit 29d3938aa56663f09666a0ac58b33e70e00abff2 (which in turn complemented commit a98cf15ed1b57aee695de01b04a974637b2cd44a), which removed BMI1 because AMD introduced it before AVX2. Looks like they also introduced LZCNT in some earlier processor too (family 10h) or GCC 12 began emitting __LZCNT__ for that family -- IIRC the AMD feature list was bigger than just the lzcnt instruction. Fixes: QTBUG-111698 Pick-to: 6.4 6.4.3 6.5 6.5.0 Change-Id: I7f354474adce419ca6c2fffd1748f5b24f69a692 Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
-rw-r--r--src/corelib/global/qsimd_p.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/corelib/global/qsimd_p.h b/src/corelib/global/qsimd_p.h
index 1d12902a0a..5d53ec7dd4 100644
--- a/src/corelib/global/qsimd_p.h
+++ b/src/corelib/global/qsimd_p.h
@@ -226,9 +226,9 @@ asm(
//
// macOS's fat binaries support the "x86_64h" sub-architecture and the GNU libc
// ELF loader also supports a "haswell/" subdir (e.g., /usr/lib/haswell).
-# define ARCH_HASWELL_MACROS (__AVX2__ + __BMI2__ + __FMA__ + __LZCNT__)
+# define ARCH_HASWELL_MACROS (__AVX2__ + __FMA__)
# if ARCH_HASWELL_MACROS != 0
-# if ARCH_HASWELL_MACROS != 4
+# if ARCH_HASWELL_MACROS != 2
# error "Please enable all x86-64-v3 extensions; you probably want to use -march=haswell or -march=x86-64-v3 instead of -mavx2"
# endif
static_assert(ARCH_HASWELL_MACROS, "Undeclared identifiers indicate which features are missing.");