diff options
| author | Thiago Macieira <thiago.macieira@intel.com> | 2022-09-30 09:49:52 -0700 |
|---|---|---|
| committer | Thiago Macieira <thiago.macieira@intel.com> | 2022-10-01 05:32:16 -0700 |
| commit | fee7844759f3c1dbc8a00139d923211990a07775 (patch) | |
| tree | 7a9a1157dd70e38a7d8401e091a7339944f4eea2 | |
| parent | 91055b66e49cf3136b59692054cdb4b76247ac53 (diff) | |
qsimd_p.h: document that AMD Zen4 supports AVX512
See https://www.mersenneforum.org/showthread.php?p=614191
Pick-to: 6.4
Change-Id: I810d70e579eb4e2c8e45fffd1719b166daf555e1
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
| -rw-r--r-- | src/corelib/global/qsimd_p.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/corelib/global/qsimd_p.h b/src/corelib/global/qsimd_p.h index be52fa2c95..a5a196a4d2 100644 --- a/src/corelib/global/qsimd_p.h +++ b/src/corelib/global/qsimd_p.h @@ -237,8 +237,10 @@ static_assert(ARCH_HASWELL_MACROS, "Undeclared identifiers indicate which featur // x86-64 sub-architecture version 4 // -// Similar to the above, x86-64-v4 marches the AVX512 variant of the Intel Core -// 6th generation (codename "Skylake"). +// Similar to the above, x86-64-v4 matches the AVX512 variant of the Intel Core +// 6th generation (codename "Skylake"). AMD Zen4 is the their first processor +// with AVX512 support and it includes all of these too. +// # define ARCH_SKX_MACROS (__AVX512F__ + __AVX512BW__ + __AVX512CD__ + __AVX512DQ__ + __AVX512VL__) # if ARCH_SKX_MACROS != 0 # if ARCH_SKX_MACROS != 5 |