qHash: update the pre-AVX512 mask to use the cacheline size

No change in behavior. But instead of trying to guess if we're going to
cross a page boundary, we check for the cacheline: if we don't cross a
cacheline boundary, then we can't cross a page boundary either. Testing
bit 4 can be implemented with a shorter instruction than a test for bit
11.

   f43de:       40 f6 c7 20             test   $0x20,%dil

Change-Id: I664b9f014ffc48cbb49bfffd17b04817a0fb8c6b
Reviewed-by: Mårten Nordheim <marten.nordheim@qt.io>

1 files changed, 4 insertions, 4 deletions

diff --git a/src/corelib/tools/qhash.cpp b/src/corelib/tools/qhash.cpp
index 8077141795..87ccc46d71 100644
--- a/src/corelib/tools/qhash.cpp
+++ b/src/corelib/tools/qhash.cpp
@@ -756,16 +756,16 @@ aeshash128_lt16(__m128i state0, const __m128i *src, const __m128i *srcend, size_
         // including NULLs at the end because the length is in the key)
         // WARNING: this may produce valgrind warnings, but it's safe
 
-        constexpr quintptr PageSize = 4096;
+        constexpr quintptr CachelineSize = 64;
         __m128i data;
 
-        if ((quintptr(src) & (PageSize / 2)) == 0) {
-            // lower half of the page:
+        if ((quintptr(src) & (CachelineSize / 2)) == 0) {
+            // lower half of the cacheline:
             __m128i mask = _mm_loadu_si128(reinterpret_cast<const __m128i *>(maskarray + 15 - len));
             data = loadu128<ZX>(src);
             data = _mm_and_si128(data, mask);
         } else {
-            // upper half of the page:
+            // upper half of the cacheline:
             __m128i control = _mm_loadu_si128(reinterpret_cast<const __m128i *>(shufflecontrol + 15 - len));
             data = loadu128<ZX>(advance<ZX>(srcend, -1));
             data = _mm_shuffle_epi8(data, control);