diff options
| author | Andreas Schwab <schwab@suse.de> | 2018-12-18 16:41:39 +0100 |
|---|---|---|
| committer | Allan Sandfeld Jensen <allan.jensen@qt.io> | 2019-04-29 13:49:26 +0000 |
| commit | 9a6a84731131b205f74b10f866ae212e0895bd4a (patch) | |
| tree | 7cfa41c8498fe3aa95d58981cfaa4f1dbe9c7ebf /src/corelib/global/qglobal.cpp | |
| parent | 8059762565d1ed6b7aaee2729d3a637efcd671d5 (diff) | |
Add RISC-V detection
Change-Id: I0203c88e0944064841c9f6fe9f8a7888d6c421d1
Reviewed-by: Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Diffstat (limited to 'src/corelib/global/qglobal.cpp')
| -rw-r--r-- | src/corelib/global/qglobal.cpp | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/src/corelib/global/qglobal.cpp b/src/corelib/global/qglobal.cpp index d95064af27..16d8d8b8ac 100644 --- a/src/corelib/global/qglobal.cpp +++ b/src/corelib/global/qglobal.cpp @@ -1884,6 +1884,42 @@ bool qSharedBuild() noexcept */ /*! + \macro Q_PROCESSOR_RISCV + \relates <QtGlobal> + \since 5.13 + + Defined if the application is compiled for RISC-V processors. Qt currently + supports two RISC-V variants: \l Q_PROCESSOR_RISCV_32 and \l + Q_PROCESSOR_RISCV_64. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_RISCV_32 + \relates <QtGlobal> + \since 5.13 + + Defined if the application is compiled for 32-bit RISC-V processors. The \l + Q_PROCESSOR_RISCV macro is also defined when Q_PROCESSOR_RISCV_32 is + defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_RISCV_64 + \relates <QtGlobal> + \since 5.13 + + Defined if the application is compiled for 64-bit RISC-V processors. The \l + Q_PROCESSOR_RISCV macro is also defined when Q_PROCESSOR_RISCV_64 is + defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! \macro Q_PROCESSOR_S390 \relates <QtGlobal> |